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Navigation: Hardware > Mega128 |
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Mega128 Übersicht
Der Mikrocontroller ATmega128 stammt aus der AVR-Familie von ATMEL. Es handelt sich um einen low-power Mikrocontroller mit Advanced RISC Architecture. Hier folgt eine kurze Zusammenstellung der Hardwareressourcen:
| • | 133 Powerful Instructions – Most Single Clock Cycle Execution |
| • | 32 x 8 General Purpose Working Registers + Peripheral Control Registers |
| • | Fully Static Operation |
| • | Up to 16 MIPS Throughput at 16 MHz |
| • | On-chip 2-cycle Multiplier |
| • | Nonvolatile Program and Data Memories |
128K Bytes of In-System Reprogrammable Flash
Endurance: 10,000 Write/Erase Cycles
Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
| • | True Read-While-Write Operation |
4K Bytes EEPROM
Endurance: 100,000 Write/Erase Cycles
4K Bytes Internal SRAM
Up to 64K Bytes Optional External Memory Space
Programming Lock for Software Security
SPI Interface for In-System Programming
| • | JTAG (IEEE std. 1149.1 Compliant) Interface |
Boundary-scan Capabilities According to the JTAG Standard
Extensive On-chip Debug Support
Programming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface
| • | Peripheral Features |
Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
Two Expanded 16-bit Timer/Counters with Separate Prescaler, Compare Mode and
Capture Mode
Real Time Counter with Separate Oscillator
Two 8-bit PWM Channels
6 PWM Channels with Programmable Resolution from 2 to 16 Bits
Output Compare Modulator
8-channel, 10-bit ADC
8 Single-ended Channels
7 Differential Channels
2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
Byte-oriented Two-wire Serial Interface
Dual Programmable Serial USARTs
Master/Slave SPI Serial Interface
Programmable Watchdog Timer with On-chip Oscillator
On-chip Analog Comparator
| • | Special Microcontroller Features |
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated RC Oscillator
External and Internal Interrupt Sources
Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby,
and Extended Standby
Software Selectable Clock Frequency
ATmega103 Compatibility Mode Selected by a Fuse
Global Pull-up Disable
| • | I/O and Packages |
53 Programmable I/O Lines
64-lead TQFP and 64-pad MLF
| • | Operating Voltages |
2.7 - 5.5V for ATmega128L
4.5 - 5.5V for ATmega128